Typically, microprogrammed systems are constructed from a variety of very large scale integrated circuit (VLSI) chips used as building blocks in an architecture which can be divided into two subsections: a control section that supervises the order and decoding of instructions to be executed, and a data processing section which performs the operations called for by the instructions on the data. The control section normally includes a microprogram sequence controller that issues microprogram addresses, and a microprogram memory which contains microinstructions.
Each microinstruction includes a plurality of bits to control the element within the data processing section. In addition, the microinstruction may have a peripheral control portion comprising a plurality of bits communicated to an "intelligent" peripheral unit so that when called upon to receive or transmit data to the host microprogrammed system, the call requires a minimum of time and control by the host microcomputer. In peripheral controller operation, the microcomputer is often faced with the requirement for the efficient synchronization and response to asynchronous events such as power failure, machine malfunctions, control panel service requests, external timer signals, and input/output device service requests. Handling these asynchronous events, in terms of response time, systems throughput, hardware costs, and memory space required, is a true measure of the performance of the system.
One approach to handling asynchronous events is to incorporate circuitry that provides a status indicator associated with each possible asynchronous event. The microcomputer system then tests each indicator in sequence and, in effect, "asks" if service is required. This is typically referred to as the "polling" method and is often microprogram software implemented. This polling method, however, consumes time and microprogram memory space. System throughput is decreased, response time increased, and microprogram memory space that could otherwise be used for additional purposes dedicated to handling responses to these asynchronous events.
Asynchronous events can also be handled via what is termed an "interrupt" technique whereby the event generates a request signal. The microcomputer system, upon receipt of the request signal, may suspend the program it is presently executing, execute an event service routine, then resume execution of the suspended program. This method, at the additional expense of circuitry, is preferred, particularly in high performance operating systems. The microcomputer is not burdened with having to poll all status signals. Rather, a service routine is executed only when requested. Thus, the system is more efficient since response time is faster; and it is this low response time that is sought by the high performance data processing systems of today.
Yet, there still exists certain problems and disadvantages using the interrupt technique with today's available bipolar microcomputer systems. Presently, additional circuitry is necessary and the sequencer must be programmed to take the time to service the interrupt request circuitry itself. Furthermore, an interrupt technique is usually implemented so that before suspending the program presently executing, the microinstruction being executed at the time the interrupt request signal is received is allowed to be completed. The resulting newly-updated contents of all registers, the program counter, and certain other quantities are saved and then control is transferred to the appropriate interrupt event service routine.
However, certain asynchronous events are of such a nature that completion of the presently-executing microinstruction will cause irreversible error. For example, if the present microinstruction calls for writing a word to memory across a word boundary in a single cycle. To avoid such error, present microprogram sequence controllers must be specially equipped with a substantial amount of external logic circuitry to implement what is termed a "trap." Attendant to such circuitry is an increased chip count, chip costs, pin interconnection, space requirements, and inter-chip signal propagation delay.